Lithography uses an imaging system that directs radiation onto a mask to form a pattern. It projects the image of that pattern onto a semiconductor wafer covered with light-sensitive photoresist. The pattern is formed from absorptive features or lines etched into the mask. The radiation used in lithography may be at any suitable wavelength, with the resolution of the system increasing with decreasing wavelength. The ability to print smaller features onto the semiconductor wafer improves as the resolution increases.
Ongoing improvements in lithography have allowed the shrinkage of semiconductor integrated circuits (ICs) to produce devices with higher density and better performance. One highly promising lithography system uses radiation in the extreme ultraviolet (EUV) wavelength range. Generally, EUV radiation has wavelengths in the range of about 1 to 40 nanometers (nm), and the EUV radiation used in lithography has wavelengths in the range of about 10 to 15 nm. Lithography carried out with radiation in this region has come to be known as EUV lithography (EUVL).
EUV radiation is strongly absorbed in virtually all materials, even gases. Absorption, therefore, rules out the use of refractive optical elements, such as lenses and transmission masks. Therefore, EUVL imaging systems are entirely reflective. In order to achieve reasonable reflectivities near normal incidence, surfaces must be coated with multilayer, thin-film coatings known as distributed Bragg reflectors. Reflective masks are usually tuned to reflect EUV light in the 10-15 nm range (bright field area). Reflective masks typically further include a patterned absorber deposited on top of the Bragg reflector that absorbs suitable wavelengths of the incident EUV light (dark field area). The height of the patterned absorber is comparable to the lateral feature sizes to be imaged onto the wafers.
EUV masks have to be free of defects and particles since those would inevitably be imaged onto the wafer well, and will, in most cases, drastically reduce the number of functioning chips per wafer. Since the features on the semiconductor chips produced by the EUVL process are in the order of a fraction of a micrometer, any particles or imperfections on the mask on the active area of the pattern can be transferred to the pattern circuit. Mask defects will cause the circuit to be improperly written and, thus, malfunction. Consequently, it is necessary to inspect the EUVL mask to ensure that no defects have been created in the pattern area by this process.
FIG. 1 shows a typical EUV mask blank manufactured according to the SEMI P37-1102 and SEMI P38 1103 EUV mask substrate and EUV mask blank specifications published in 2002 by the Semiconductor Equipment and Materials International of San Jose, Calif. The mask 105 comprises an EUV mask substrate 110, an EUV Bragg reflector 120, an optional protective layer commonly called a capping layer 130, a protective buffer layer 140 to prevent damage during absorber patterning and mask repair, and an EUV absorber layer 150. Various embodiments of an EUV mask according to the prior art will be described next.
As shown in FIG. 1, a substrate 110 with a low defect level and a smooth surface is used as the starting material for an EUV mask. The substrate 110 generally a glass or glass-ceramic material that has a low coefficient of thermal expansion (CTE). However, in some cases, the substrate 110 may be Silicon. Although Silicon has a large CTE that may result in undesirable displacement of printed images, Silicon also has a high thermal conductivity and thus may be a viable substrate as long as heat can be removed efficiently from the mask during exposure.
As further shown in FIG. 1, a multilayer (ML) mirror, or Bragg reflector, 120 covers the substrate 110. The Bragg reflector 120 includes about 20-80 pairs of alternating layers of a high atomic number, high Z, material and a low Z material. The high Z material may be about 2.8 nm thick Molybdenum (Mo) while the low Z material may be about 4.1 nm thick Silicon (Si).
An optional capping layer 130, such as about 11.0 nm thick Silicon (Si), may cover the top of the Bragg reflector 120 to prevent oxidation of Molybdenum in the environment. The Bragg reflector 120 can achieve about 60-75% reflectivity at an illumination wavelength of about 13.4 nm.
Referring again to FIG. 1, a buffer layer 140 covers the upper surface of the Bragg reflector 120. The buffer layer 140 may have a thickness of about 20-105 nm. It may include Silicon Dioxide (SiO2), such as low temperature oxide (LTO). Other materials, such as Silicon Oxynitride (SiOxNy) or Carbon (C) may also be used for the buffer layer 140.
As shown in FIG. 1, an absorber layer 150 covers the buffer layer 140. The absorber layer 150 may include about 45-215 nm of a material that will attenuate EUV light, remain stable during exposure to EUV light, and be compatible with the mask fabrication process.
Various metals, alloys, and ceramics may comprise the absorber layer 150. Ceramics are compounds formed from metals and nonmetals. Examples of metals include Aluminum (Al), Aluminum-Copper (AlCu), Chromium (Cr), Nickel (Ni), Tantalum (Ta), Titanium (Ti), and Tungsten (W). In some cases, the absorber layer 150 may be partially or entirely formed out of borides, carbides, nitrides, oxides, phosphides, suicides, or sulfides of certain metals. Examples include Nickel Silicide (NiSi), Tantalum Boride (TaB), Tantalum Germanium (TaGe), Tantalum Nitride (TaN), Tantalum Silicide (TaSi), Tantalum Silicon Nitride (TaSiN), and Titanium Nitride (TiN).
FIGS. 2a-2h show the sequence of major process steps during mask manufacturing. The initial steps comprise coating FIG. 2a the mask with resist 160, exposing FIG. 2b the resist 160, and developing FIG. 2c the pattern (not shown). In the step illustrated in FIG. 2d, the pattern is transferred from the resist to the absorber using an absorber etch. In the absorber etch step, FIG. 2d, it is preferable that the absorber and buffer have high etch selectivity. In the next step, FIG. 2e, the mask is inspected for defects after absorber etch and resist removal.
In order to locate defects, such as absorber residue in a bright field area, current technology requires high optical contrast between the absorber and buffer layers. Since both absorber and buffer are very thin layers, choosing the right layer thickness for optimal inspection contrast is as important as choosing the right layer materials.
Referring again to FIGS. 2a-2h, a mask repair step, FIG. 2f, follows inspection, FIG. 2e. One repair method, a Focused Ion Beam (FIB) can evaporate unwanted absorber from a bright field area. A focused ion beam can also cause local deposition from an absorber-bearing gas at a clear spot defect (dark field repair).
In the step illustrated in FIG. 2g, the buffer layer is patterned with another etch. The etch process stops either on an optional protective capping layer 130 or on the topmost layer of the Bragg reflector 120.
After the buffer layer has been removed from the bright areas, mask patterning is completed. The material exposed in the bright area (capping layer or topmost layer of Bragg reflector) and the sidewalls (absorber and buffer material) have to withstand repetitive mask cleaning, FIG. 2h, without damage to mask.
The requirements with respect to the individual layers in the process steps shown in FIGS. 2a-2h are very difficult to meet simultaneously. The layers must have good etch selectivity for patterning. The mask layers must be thick enough to enable EUV mask repair without damaging the Bragg reflector. On the other hand, thin layers decrease the time needed for removing bright field defects. The mask must be robust enough to tolerate repetitive cleaning, which again favors thick layers. Balancing these competing processing requirements is especially difficult for the buffer layer, especially for inspection. The buffer layer must have a high optical contrast with respect to the absorber material for inspection.
In the past, optical lithography was also concerned with defects in masks. The large expense associated with mask fabrication requires that a mask not be discarded for small defects. Even more importantly, a defective mask often leads to defective devices. For masks used in step and repeat operations, i.e. reticles, a single mask defect can ruin an entire wafer. Generally, the transmissive masks used in optical lithography can be inspected without difficulty since the contrast between the opaque regions and the clear regions is high at most wavelengths. For next generation lithography, such as EUV lithography, inspection is more difficult.
Inspection for defects on the EUV mask is usually done at UV/DUV wavelengths, 150-500 nm. A problem is that contrast between the EUV mask layers is often inadequate. Manufacturers have recognized this problem and have taken steps to improve EUV mask contrast (see U.S. Pat. Nos. 6,720,118 and 6,583,068). However, some of these methods still remain limited to inspection at the UV/DUV wavelengths.
What is needed is an EUV mask that is not constrained by UV/DUV contrast requirements.